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손상된 .git 히스토리(missing tree)로 재초기화 후 작업트리 전체 커밋. .claude/ 만 제외(로컬 에이전트 설정). 구 저장소 백업(.git_corrupt_backup/) 포함. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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/**************************************************************************//**
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* @file sc.h
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* @version V1.00
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* $Revision: 7 $
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* $Date: 15/07/31 7:26p $
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* @brief Nano100 series Smartcard (SC) driver header file
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2013~2014 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __SC_H__
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#define __SC_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup NANO100_Device_Driver NANO100 Device Driver
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@{
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*/
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/** @addtogroup NANO100_SC_Driver SC Driver
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@{
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*/
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/** @addtogroup NANO100_SC_EXPORTED_CONSTANTS SC Exported Constants
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@{
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*/
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#define SC_INTERFACE_NUM 3 /*!< Smartcard interface numbers */
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#define SC_PIN_STATE_HIGH 1 /*!< Smartcard pin status high */
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#define SC_PIN_STATE_LOW 0 /*!< Smartcard pin status low */
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#define SC_PIN_STATE_IGNORE 0xFFFFFFFF /*!< Ignore pin status */
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#define SC_CLK_ON 1 /*!< Smartcard clock on */
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#define SC_CLK_OFF 0 /*!< Smartcard clock off */
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#define SC_TMR_MODE_0 (0ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 0, down count */
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#define SC_TMR_MODE_1 (1ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 1, down count, start after detect start bit */
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#define SC_TMR_MODE_2 (2ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 2, down count, start after receive start bit */
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#define SC_TMR_MODE_3 (3ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 3, down count, use for activation, only timer 0 support this mode */
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#define SC_TMR_MODE_4 (4ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 4, down count with reload after timeout */
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#define SC_TMR_MODE_5 (5ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 5, down count, start after detect start bit, reload after timeout */
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#define SC_TMR_MODE_6 (6ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 6, down count, start after receive start bit, reload after timeout */
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#define SC_TMR_MODE_7 (7ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 7, down count, start and reload after detect start bit */
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#define SC_TMR_MODE_8 (8ul << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 8, up count */
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#define SC_TMR_MODE_F (0xF << SC_TMR0_MODE_Pos) /*!<Timer Operation Mode 15, down count, reload after detect start bit */
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/*@}*/ /* end of group NANO100_SC_EXPORTED_CONSTANTS */
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/** @addtogroup NANO100_SC_EXPORTED_FUNCTIONS SC Exported Functions
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@{
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*/
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/**
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* @brief This macro enable smartcard interrupt
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* @param[in] sc Base address of smartcard module
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* @param[in] u32Mask Interrupt mask to be enabled. A combination of
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* - \ref SC_IER_ACON_ERR_IE_Msk
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* - \ref SC_IER_RTMR_IE_Msk
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* - \ref SC_IER_INIT_IE_Msk
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* - \ref SC_IER_CD_IE_Msk
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* - \ref SC_IER_BGT_IE_Msk
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* - \ref SC_IER_TMR2_IE_Msk
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* - \ref SC_IER_TMR1_IE_Msk
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* - \ref SC_IER_TMR0_IE_Msk
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* - \ref SC_IER_TERR_IE_Msk
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* - \ref SC_IER_TBE_IE_Msk
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* - \ref SC_IER_RDA_IE_Msk
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* @return None
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* \hideinitializer
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*/
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#define SC_ENABLE_INT(sc, u32Mask) ((sc)->IER |= (u32Mask))
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/**
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* @brief This macro disable smartcard interrupt
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* @param[in] sc Base address of smartcard module
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* @param[in] u32Mask Interrupt mask to be disabled. A combination of
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* - \ref SC_IER_ACON_ERR_IE_Msk
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* - \ref SC_IER_RTMR_IE_Msk
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* - \ref SC_IER_INIT_IE_Msk
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* - \ref SC_IER_CD_IE_Msk
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* - \ref SC_IER_BGT_IE_Msk
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* - \ref SC_IER_TMR2_IE_Msk
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* - \ref SC_IER_TMR1_IE_Msk
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* - \ref SC_IER_TMR0_IE_Msk
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* - \ref SC_IER_TERR_IE_Msk
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* - \ref SC_IER_TBE_IE_Msk
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* - \ref SC_IER_RDA_IE_Msk
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* @return None
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* \hideinitializer
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*/
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#define SC_DISABLE_INT(sc, u32Mask) ((sc)->IER &= ~(u32Mask))
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/**
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* @brief This macro set VCC pin state of smartcard interface
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* @param[in] sc Base address of smartcard module
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* @param[in] u32State Pin state of VCC pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
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* @return None
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* \hideinitializer
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*/
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#define SC_SET_VCC_PIN(sc, u32State) \
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do {\
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uint32_t reg = (sc)->PINCSR;\
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if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
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((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
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reg &= ~SC_PINCSR_POW_EN_Msk;\
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else\
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reg |= SC_PINCSR_POW_EN_Msk;\
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if(u32State)\
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(sc)->PINCSR = reg | SC_PINCSR_POW_EN_Msk;\
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else\
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(sc)->PINCSR = reg & ~SC_PINCSR_POW_EN_Msk;\
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}while(0)
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/**
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* @brief This macro turns CLK output on or off
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* @param[in] sc Base address of smartcard module
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* @param[in] u32OnOff Clock on or off for selected smartcard module, valid values are \ref SC_CLK_ON and \ref SC_CLK_OFF
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* @return None
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* \hideinitializer
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*/
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#define SC_SET_CLK_PIN(sc, u32OnOff)\
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do {\
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uint32_t reg = (sc)->PINCSR;\
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if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
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((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
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reg &= ~SC_PINCSR_POW_EN_Msk;\
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else\
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reg |= SC_PINCSR_POW_EN_Msk;\
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if(u32OnOff)\
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(sc)->PINCSR = reg | SC_PINCSR_CLK_KEEP_Msk;\
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else\
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(sc)->PINCSR = reg & ~SC_PINCSR_CLK_KEEP_Msk;\
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}while(0)
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/**
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* @brief This macro set I/O pin state of smartcard interface
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* @param[in] sc Base address of smartcard module
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* @param[in] u32State Pin state of I/O pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
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* @return None
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* \hideinitializer
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*/
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#define SC_SET_IO_PIN(sc, u32State)\
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do {\
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uint32_t reg = (sc)->PINCSR;\
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if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
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((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
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reg &= ~SC_PINCSR_POW_EN_Msk;\
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else\
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reg |= SC_PINCSR_POW_EN_Msk;\
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if(u32State)\
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(sc)->PINCSR = reg | SC_PINCSR_SC_DATA_O_Msk;\
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else\
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(sc)->PINCSR = reg & ~SC_PINCSR_SC_DATA_O_Msk;\
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}while(0)
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/**
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* @brief This macro set RST pin state of smartcard interface
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* @param[in] sc Base address of smartcard module
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* @param[in] u32State Pin state of RST pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
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* @return None
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* \hideinitializer
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*/
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#define SC_SET_RST_PIN(sc, u32State)\
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do {\
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uint32_t reg = (sc)->PINCSR;\
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if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
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((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
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reg &= ~SC_PINCSR_POW_EN_Msk;\
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else\
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reg |= SC_PINCSR_POW_EN_Msk;\
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if(u32State)\
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(sc)->PINCSR = reg | SC_PINCSR_SC_RST_Msk;\
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else\
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(sc)->PINCSR = reg & ~SC_PINCSR_SC_RST_Msk;\
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}while(0)
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/**
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* @brief This macro read one byte from smartcard module receive FIFO
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* @param[in] sc Base address of smartcard module
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* @return[in] One byte read from receive FIFO
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* \hideinitializer
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*/
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#define SC_READ(sc) ((char)((sc)->RBR))
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/**
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* @brief This macro write one byte to smartcard module transmit FIFO
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* @param[in] sc Base address of smartcard module
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* @param[in] u8Data Data to write to transmit FIFO
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* @return None
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* \hideinitializer
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*/
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#define SC_WRITE(sc, u8Data) ((sc)->THR = (u8Data))
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/**
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* @brief This macro set smartcard stop bit length
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* @param[in] sc Base address of smartcard module
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* @param[in] u32Len Stop bit length, ether 1 or 2.
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* @return None
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* @details Stop bit length must be 1 for T = 1 protocol and 2 for T = 0 protocol.
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* \hideinitializer
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*/
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#define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_SLEN_Msk) | (u32Len == 1 ? SC_CTL_SLEN_Msk : 0))
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/**
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* @brief Enable/Disable Tx error retry, and set Tx error retry count
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* @param[in] sc Base address of smartcard module
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* @param[in] u32Count The number of times of Tx error retry count, between 0~8. 0 means disable Tx error retry
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* @return None
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*/
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__STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
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{
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// Retry count must set while enable bit disabled, so disable it first
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sc->CTL &= ~(SC_CTL_TX_ERETRY_Msk | SC_CTL_TX_ERETRY_EN_Msk);
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if(u32Count != 0)
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{
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sc->CTL |= ((u32Count - 1) << SC_CTL_TX_ERETRY_Pos) | SC_CTL_TX_ERETRY_EN_Msk;
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}
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}
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/**
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* @brief Enable/Disable Rx error retry, and set Rx error retry count
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* @param[in] sc Base address of smartcard module
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* @param[in] u32Count The number of times of Rx error retry count, between 0~8. 0 means disable Rx error retry
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* @return None
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*/
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__STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
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{
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// Retry count must set while enable bit disabled, so disable it first
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sc->CTL &= ~(SC_CTL_RX_ERETRY_Msk | SC_CTL_RX_ERETRY_EN_Msk);
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if(u32Count != 0)
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{
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sc->CTL |= ((u32Count - 1) << SC_CTL_RX_ERETRY_Pos) | SC_CTL_RX_ERETRY_EN_Msk;
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}
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}
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uint32_t SC_IsCardInserted(SC_T *sc);
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void SC_ClearFIFO(SC_T *sc);
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void SC_Close(SC_T *sc);
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void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
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void SC_ResetReader(SC_T *sc);
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void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT);
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void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT);
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void SC_StopAllTimer(SC_T *sc);
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void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
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void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum);
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/*@}*/ /* end of group NANO100_SC_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group NANO100_SC_Driver */
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/*@}*/ /* end of group NANO100_Device_Driver */
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#ifdef __cplusplus
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}
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#endif
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#endif //__SC_H__
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/*** (C) COPYRIGHT 2013~2014 Nuvoton Technology Corp. ***/
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